(PR) AMD Announces Production Ramp of Next-Generation AMD EPYC Processor "Venice" on TSMC 2nm Process Technology

AMD today announced that its next-generation AMD EPYC processor, codenamed "Venice," is ramping production in Taiwan on TSMC's advanced 2 nm process technology, with future plans to ramp production at TSMC's Arizona fabrication facility. The milestone in the execution of the AMD data center CPU roadmap demonstrates continued progress toward delivering the leadership performance and energy efficiency required for next-generation cloud, enterprise and AI infrastructure. "Venice" is the first high-performance computing (HPC) product in the industry to enter production on TSMC's advanced 2 nm process technology.

"Ramping 'Venice' on TSMC 2 nm process technology marks an important step forward in accelerating the next generation of AI infrastructure," said Dr. Lisa Su, chair and CEO, AMD. "As AI and agentic workloads scale rapidly, customers need platforms that can move from innovation to production faster. Our deep partnership with TSMC is helping AMD bring leadership compute technologies to market with the speed and scale required to meet this moment."